Plenary Keynotes When: Tue 3 Feb 2026 08:45 - 09:45 People: Cristina Cifuentes

… to a DevSecOps model where security gets integrated at all levels of the software process …

Main Conference When: Tue 3 Feb 2026 10:50 - 11:10 People: Xinru Tang, Jingxiang Hou, Dingcheng Jiang, Taiquan Wei, Jiaxin Liu, Jinyi Deng, Huizheng Wang, Qize Yang, Haoran Shang, Chao Li, Yang Hu, Shouyi Yin

… parallelism (EP) to alleviate memory bottleneck, which introduces all-to-all … GPU clusters, high-overhead cross-node communication makes all-to-all expensive … provide a unified high-performance network connecting all devices, presenting …

Industry Track When: Tue 3 Feb 2026 17:15 - 17:35 People: Deanna Berger, Alper Buyuktosunoglu, Craig Walters, Robert Sonnelitter, Hailey Nicholson, Ashraf ElSharif, Yamil Rivera, Avery Francois, Cedric Lichtenau, Jason Kohl

… with a sustained processor utilization of over 90% under all workload conditions … with an integrated multi-tier unified cache hierarchy all within one chip. The processor chip design leverages a unique approach to ensure all elements work in unison …

Main Conference When: Tue 3 Feb 2026 10:50 - 11:10 People: Yiquan Lin, Wenhai Lin, Yiquan Chen, Jiexiong Xu, Shishun Cai, Jiarong Ye, Zonghui Wang, Wenzhi Chen

… prefetchers for issuing requests, but they all face limitations. Specifically, existing … prefetcher’s PE, and the Control Engine, which dynamically manages all …

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