HPCA 2026
Sat 31 January - Wed 4 February 2026 Sydney, Australia
co-located with HPCA/CGO/PPoPP/CC 2026

Industry Track Manuscript Submission

LaTeX TemplateLink

At its best, computer architecture is a dialogue between science and engineering—informed both by the possibility of transformative new applications and architectures and grounded in practical implementation and deployment. This track aims to educate the wider computer architecture community on the challenges facing industry and to encourage them to investigate solutions. The session will include a small number of papers selected based on depth and relevance to the HPCA audience. Architects, designers, and developers involved in some aspect of industrial computer system design and development are invited to submit papers describing existing, planned, or canceled products, as well as new challenges, issues, and opportunities in next-generation computer systems. Submitted papers need to provide insights and results that are unique to industry and that make it clearly distinguishable from a regular paper.


Authors should submit an abstract by September 12, 2025. They should submit the full version of the paper by September 19, 2025. No extensions will be granted. The full version should be a PDF file following the submission guidelines that will be made available at the submission website.

Papers should be submitted for double-blind review. The company or product name in question need not be obscured, but no references should be made to individual author identities.


Please take note of the following guidelines for the industry track:

  • The goal of the HPCA industry track is to publish papers written by industry authors with content related to an industrial product/process. This includes both existing products and planned products, even if the product was cancelled, as long as interesting insights/learned lessons are presented in the paper. 
  • Examples are papers that describe a product, papers that characterize a product, papers that describe some interesting component of a product, papers that provide some insights on challenges faced by industry, etc.
  • Papers must have the first author and most authors be from industry. Papers may include co-authors from academia, provided that the content is clearly related to an industrial product/process. On the other hand, research papers whose scope is not clearly related to a product are not appropriate for this track and will be rejected from the industry track.  Such papers should be submitted to the regular track even if authors are from industry.
  • Papers will be evaluated with the same standards of quality as papers submitted to the regular track. Papers must be blinded in that they may not reveal individual authorship.

Topics of interest include, but are not limited to:

  • New Topic: Applications of generative AI for HPC
  • Domain specific architectures and accelerators
  • Architectures for cloud, HPC, and data centers
  • GPUs, their architecture, microarchitecture, and domain adaptations such as Tensor Cores
  • Algorithm/IP co-design and co-optimization
  • Processor, cache, and memory architectures
  • Parallel/Multi-core architectures
  • Power-efficient architectures
  • Dependable/secure architectures
  • Analysis and exploitation of product security vulnerabilities
  • High-performance I/O systems
  • Embedded, IoT, reconfigurable, and heterogeneous architectures
  • Interconnect and network interface architectures
  • Innovative hardware/software trade-offs
  • Impact of compilers and system software on architecture
  • Performance/Power modeling and evaluation
  • Architectures for emerging technology and applications

Important Dates


Abstract SubmissionSeptember 12, 2025
Paper SubmissionSeptember 19, 2025
Revision/Rebuttal PeriodOctober 31 – November 7, 2025
NotificationNovember 14, 2025
Final Papers DueTBD

Industry Track Manuscript Submission

LaTeX TemplateLink

At its best, computer architecture is a dialogue between science and engineering—informed both by the possibility of transformative new applications and architectures and grounded in practical implementation and deployment. This track aims to educate the wider computer architecture community on the challenges facing industry and to encourage them to investigate solutions. The session will include a small number of papers selected based on depth and relevance to the HPCA audience. Architects, designers, and developers involved in some aspect of industrial computer system design and development are invited to submit papers describing existing, planned, or canceled products, as well as new challenges, issues, and opportunities in next-generation computer systems. Submitted papers need to provide insights and results that are unique to industry and that make it clearly distinguishable from a regular paper.


Authors should submit an abstract by September 12, 2025. They should submit the full version of the paper by September 19, 2025. No extensions will be granted. The full version should be a PDF file following the submission guidelines that will be made available at the submission website.

Papers should be submitted for double-blind review. The company or product name in question need not be obscured, but no references should be made to individual author identities.


Please take note of the following guidelines for the industry track:

  • The goal of the HPCA industry track is to publish papers written by industry authors with content related to an industrial product/process. This includes both existing products and planned products, even if the product was cancelled, as long as interesting insights/learned lessons are presented in the paper. 
  • Examples are papers that describe a product, papers that characterize a product, papers that describe some interesting component of a product, papers that provide some insights on challenges faced by industry, etc.
  • Papers must have the first author and most authors be from industry. Papers may include co-authors from academia, provided that the content is clearly related to an industrial product/process. On the other hand, research papers whose scope is not clearly related to a product are not appropriate for this track and will be rejected from the industry track.  Such papers should be submitted to the regular track even if authors are from industry.
  • Papers will be evaluated with the same standards of quality as papers submitted to the regular track. Papers must be blinded in that they may not reveal individual authorship.

Topics of interest include, but are not limited to:

  • New Topic: Applications of generative AI for HPC
  • Domain specific architectures and accelerators
  • Architectures for cloud, HPC, and data centers
  • GPUs, their architecture, microarchitecture, and domain adaptations such as Tensor Cores
  • Algorithm/IP co-design and co-optimization
  • Processor, cache, and memory architectures
  • Parallel/Multi-core architectures
  • Power-efficient architectures
  • Dependable/secure architectures
  • Analysis and exploitation of product security vulnerabilities
  • High-performance I/O systems
  • Embedded, IoT, reconfigurable, and heterogeneous architectures
  • Interconnect and network interface architectures
  • Innovative hardware/software trade-offs
  • Impact of compilers and system software on architecture
  • Performance/Power modeling and evaluation
  • Architectures for emerging technology and applications

Important Dates


Abstract SubmissionSeptember 12, 2025
Paper SubmissionSeptember 19, 2025
Revision/Rebuttal PeriodOctober 31 – November 7, 2025
NotificationNovember 14, 2025
Final Papers DueTBD

Industry Track Manuscript Submission

Plenary

This program is tentative and subject to change.

You're viewing the program in a time zone which is different from your device's time zone change time zone

Tue 3 Feb

Displayed time zone: Hobart change

17:15 - 18:15
Industry TrackIndustry Track at Coogee
17:15
20m
Industry talk
Enterprise Class On-Chip Accelerator Integration
Industry Track
17:35
20m
Industry talk
Characterizing Cloud-Native LLM Inference at ByteDance and Exposing Optimization Challenges and Opportunities for Future AI Accelerators
Industry Track
Jingwei Cai ByteDance Seed, Dehao Kong , Huang Hantao ByteDance Seed, Zishan Jiang ByteDance Seed, Zixuan Ma ByteDance Seed, Qingyu Guo ByteDance Seed, Zhenxing Zhang ByteDance Seed, Guiming Shi Tsinghua University, Mingyu Gao Tsinghua University, Kaisheng Ma Tsinghua University, Minghui Yu ByteDance Seed
17:55
20m
Industry talk
eGPU: Production-Scale Elastic Sharing over 10,000 GPUs
Industry Track
Xiaochuan Tang Alibaba Group, Hao Qi , Jianbo Dong Alibaba Group, Yinghao Yu Alibaba Group, Zhennan Xue Alibaba Group, Zhengyu Zhang Alibaba Group, Daocheng Ying Alibaba Group, Zheng Cao Alibaba Group, Xiaoyi Lu UC Merced
18:30 - 21:30
18:30
3h
Social Event
Excursion
HPCA/CGO/PPoPP/CC Catering