Hardware prefetching is a well-established technique for bridging the processor-memory performance gap. To improve cache miss coverage, modern processors often integrate multiple prefetchers. However, multi-prefetcher systems without proper management often suffer from suboptimal performance due to a surge of useless prefetches. Several techniques have been proposed to select appropriate prefetchers for issuing requests, but they all face limitations. Specifically, existing (1) static schemes lack feedback regulation mechanisms and suffer from inflexible prefetcher selections; (2) RL-based schemes incur high overhead and suffer from adjustment lag; and (3) historical performance-based schemes rely on inefficient runtime metrics that fail to accurately and clearly reflect a prefetcher’s true impact on performance.

In this paper, we propose I-POP, a high-performance and low-overhead prefetcher management scheme for multi-prefetcher systems. I-POP introduces a novel runtime metric, Prefetch Effectiveness (PE), which aggregates each prefetch request’s beneficial and harmful effects to precisely quantify the impact of a prefetcher on IPC performance, effectively overcoming the limitations of prior metrics. To compute and leverage this metric, I-POP incorporates two key components: the Metric Collector, which periodically calculates each prefetcher’s PE, and the Control Engine, which dynamically manages all prefetchers based on their PE values. Specifically, I-POP ignites (enables) prefetchers with positive PE values, adaptively tuning their aggressiveness, and disables those with non-positive PE. We evaluated I-POP on numerous workloads, and the results show I-POP outperforms two state-of-the-art approaches, Bandit and Alecto, by 3.8% and 3.7% across four benchmark suites in a single-core system, and 9.3% and 6.4% in a 16-core system, while incurring only 1.47 KB of storage overhead.